What are the common PCB layout mistakes and how to avoid them?

Printed circuit boards require careful, methodical design work. Even a small layout error can keep a board from functioning correctly or, worse, make it impossible to manufacture at all. In our years of providing PCB layout services, we’ve seen the same handful of mistakes come up again and again, often because they aren’t obvious until the board is already in fabrication or assembly. Catching these issues early, ideally during a design-for-manufacturability (DFM) review, saves both the cost of a respin and the schedule delay that comes with it. Here are five of the most common PCB layout mistakes and how to avoid each one.

1. Incorrect Landing Patterns

Most PCB design software includes libraries of pre-designed schematic symbols and footprints for common components, but any project that uses a part outside those libraries requires a custom footprint to be drawn by hand. This is where small errors creep in: a landing pattern that is off by even a fraction of a millimeter can prevent a component from seating correctly, cause poor solder joints, or make the part impossible to place with automated pick-and-place equipment. The safest practice is to verify custom footprints against the component’s actual datasheet dimensions, not against a similar part’s existing footprint, and to run a design rule check (DRC) before finalizing the layout. When in doubt, request a physical sample or 3D model from the manufacturer to confirm dimensions before committing to a design.

2. Wireless Antenna Placement

Boards that include a wireless antenna add an extra layer of complexity to the layout, since an antenna’s performance depends heavily on both its placement and the transmission line that feeds it. For best results, keep the antenna away from large ground planes, metal enclosures, and other components that can detune it. Route its feed line as a controlled-impedance trace, which is typically a 50-ohm microstrip calculated for the board’s specific stackup rather than assumed from a reference design. An LC matching network between the transceiver and the antenna is usually necessary to maximize power transfer and minimize reflected signal loss. Skipping this step is one of the most common reasons a wireless board passes bench testing but underperforms once it is inside its final enclosure.

3. Placement of Decoupling Capacitors

Decoupling capacitors filter noise on a component’s power supply pin, but they can only do this effectively if they are placed as close as possible (both electrically and physically) to the pin they are protecting. The longer the trace between a capacitor and the pin it serves, the more parasitic inductance is introduced into that connection, which reduces the capacitor’s ability to respond quickly to sudden changes in current draw. As a general rule, place the smallest-value decoupling capacitors closest to the component, with larger bulk capacitors positioned slightly farther out on the same power net. Getting this placement wrong is a common source of intermittent noise issues that are difficult to diagnose after a board has already been assembled.

4. PCB Trace Width

Trace width directly affects how much current a trace can safely carry and how much it will heat under load, which makes it easy to miscalculate if it is treated as a single fixed number rather than a calculation based on several factors. The correct width depends on whether the trace sits on an internal or external layer, the thickness (weight) of the copper being used, and the amount of temperature rise that is acceptable for the application. As a general guideline, designs commonly target a temperature rise of around 10°C and rarely exceed 20°C, though the exact figures should always be confirmed against IPC-2221 current-carrying capacity tables for the specific board. Using a trace width calculator built around these standards, rather than reusing a width from a previous project, is the most reliable way to avoid both overheating and unnecessarily wide, board-space-wasting traces.

5. Improper Use of Vias

Vias connect copper layers within a PCB, but not every via type is available on every fabrication process. Choosing the wrong one for a given connection can make a design unmanufacturable or significantly more expensive to produce. A through-via runs the full thickness of the board and connects every layer, making it the simplest and least expensive option when space allows. A blind via connects an outer layer to one or more inner layers without passing all the way through the board, while a buried via connects two or more inner layers with no connection to either outer surface; both are more advanced, higher-cost processes typically reserved for high-density designs where board space is at a premium. Confirming which via types a fabricator actually supports, and at what cost, before finalizing a layout prevents a design from being sent back for rework after it has already been submitted for quoting.

These five mistakes account for a large share of the layout issues we see come through for fabrication and assembly, and all of them are avoidable with the right design review process in place. If you’d rather have an experienced team catch these issues before they become expensive to fix, BESTProto’s PCB layout and design services are built around exactly that kind of review.

Frequently Asked Questions

How much extra cost does a layout mistake typically add if it's caught after a board is already fabricated?

Catching a mistake after fabrication usually means a full respin: a new fabrication run, plus the wasted components and labor from the first build. Catching the same issue during a design review or DRC, before the board is ever sent to a fabricator, avoids that cost entirely.

Most of them apply regardless of layer count. Landing pattern accuracy, decoupling capacitor placement, and trace width calculations matter on any board. Via type selection is the exception, since blind and buried vias are mainly relevant to higher-layer-count, high-density designs where a simple through via won’t fit.

No. A DRC catches spacing and clearance rule violations, but placement judgment calls, like how close a decoupling capacitor sits to its pin or how an antenna is positioned relative to other components, require a human design review rather than an automated check.

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